Sudeep H R ELECTRONICS AND COMMUNICATION ENGINEER
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MY PROJECT DETAILS
M.TECH PROJECT
"MINIATURIZED SLOTTED PATCH ANTENNA FOR X-BAND AND K-BAND APPLICATIONS" ANSIS hfss 15 VERSION,
B E PROJECT :
" SWASTIKA SHAPED CIRCULAR PATCH ANTENNA FOR GSM AND WIFI APPLICATION USING ANSIS hfss

SUBJECT HANDLED

DIGITAL ELECTRONICS, MICRO CONTROLLER AND APPLICATIONS, VHDL VERILOG, ELECTRONICS MEASUREMENT AND INSTRUMENTATION, SEMICONDUCTOR DEVICES, WIRELESS COMMUNICATION, ANALOG ELECTRONICS, ANALOG COMMUNICATION, POWER ELECTRONICS, HARDWARE AND NETWORKING LAB, PC HARDWARE LAB, DIGITAL COMMUNICATION,

OTHER WORKING EXPERIENCE,

SCHOLARSHIP OF NSP AND SSP, ESIS ERP, ACCOUNTS, SALARY, PF, ESI, EXAMINATION WORK,
SEVASINDU, N COMPUTING COMPUTER MAINTENANCE, DESKTOP MAINTENANCE AND SERVICING, NETWORKING MAINTENANCE

Subjects

  • Digital Electronics Expert

  • Antenna designing Beginner-Intermediate

  • ECE subjects Intermediate

  • Verilog HDL and VHDL Intermediate

  • Analog & Digital communications Intermediate

Experience

  • LECTURER (Jan, 2018–Present) at SJ BGS POLYTECHNIC
    LECTURER

Education

  • M TECH (Sep, 2016–Jun, 2018) from VTU PG studies MYSORE
  • BE (Aug, 2011–May, 2015) from Goverment engineering college
  • DIPLOMA (Jun, 2006–May, 2009) from SET polytechnic

Fee details

    ₹30,000–35,000/month (US$359.28–419.16/month)

    DID NOT WORRY

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