Shashwat Kaushik Sr. Analog Design Engineer

First of all a well known industry employed me so definately I must be having strong hold on fundamentals and the art to make design work in reality. Secondly, I have 9 Research papers published in decent conferences and transactions, which points about my research capabilities and presentation skill. Thirdly most important, I have been helping my classmates in there projects and assignments since my secondary education. I have also guided to juniors for there thesis. I was TA and official mentor too. I also helped my elder sister for there GMAT preparation and nephew for SAT and ACT preparation. I also taught my elder sister the engineering mathematics, while i was in higher secondary school. I still teach and solve some problems of my nephew who is in Georgia State University. And I am being credited to ignite the intrest in my juniors for Circuits and system design.
One most important and honest thing is that I don't know everything everytime but I have capability to understand and make student to grasp with multiple real life example.
Please don't trust me blindly, I will be happy to be proven wrong.
Think simple.

Subjects

  • Analog Circuits and Systems (Beginner-Expert)

  • Analog CMOS Circuits (Beginner-Expert)

  • Circuit theory (Beginner-Expert)

  • Basic circuit analysis (Beginner-Expert)

  • Analog Circuits (Beginner-Expert)


Experience

  • Sr. Analog Designer (Jun, 2017 - Present) at ST Microelectronics
    I am involved on cmos level circuit and system design and verification. I worked on multiple technology and tools. Power management circuit and system is Focus area but also involved with other use case Circuits. Like ADC, specific wired communication protocol circuit. Receiver base band circuit.
  • Design engineer (Jun, 2016 - Jun, 2017) at NXP Semiconductor
    Working for sensor and associated system for pressure measurement. I was involved in system architecture design and verification . I worked on RTL level definition using verilog.

Education

  • M.tech in VLSI (Jun, 2014 - Jun, 2016) from IIITD

Fee details

    1,500-6,000/hour (US$20.98-83.93/hour)

    Depends on situation