A highly skilled professional in the semiconductor industry with over 7 years of experience, I hold a Master’s degree in IC Design from the Technical University of Munich (TUM), Germany, and a Bachelor's in Electronics and Communication. My expertise spans the full spectrum of chip design and verification, with a strong foundation in semiconductor sciences, digital systems, and UVM-based verification methodologies.
Alongside my professional work, I am passionate about teaching and mentoring the next generation of engineers. I offer practical, interactive sessions covering the fundamentals of physics, mathematics, semiconductor devices, System on Chip (SoC) design concepts, and modern verification techniques. My approach bridges academic theory with real-world industry insights, helping students build a strong, application-driven understanding of complex technical subjects.
Subjects
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Maths Grade 1-Bachelors/Undergraduate
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UVM (Universal Verification Methodology) Beginner-Expert
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Science & Technology Grade 1-Grade 12
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Semiconductor Physics and Devices Beginner-Intermediate
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Physics (10th grade)
Experience
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Staff verification engineer (Jan, 2024
–Present) at Synopsys
Semiconductor professional with 6+ years of experience in SoC verification. Masters in IC design from.TUM Germany
Education
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Masters in. integrated circuit design (Jan, 2013–Jan, 2017) from Technical University of Munich, Germany–scored SoC
Fee details
€20–40/hour
(US$23.26–46.51/hour)
For elementary and high school - 20 euros per hour
For UVM based verification methodology training - 40 euros per hour