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Shashank Patel ASIC presilicon Verification engineer
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🧠 SystemVerilog & UVM Tutor | VLSI Functional Verification | Project & Interview Support
Hello! I’m Shashank, a VLSI Verification engineer with several years of hands-on industry experience in Functional Verification, SystemVerilog, and UVM.
I specialize in teaching students, freshers, and professionals who want to break into the VLSI domain, strengthen their verification skills, or prepare for job interviews in top semiconductor companies.
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✅ What I Teach:
SystemVerilog (from basics to advanced OOP concepts)
UVM (Universal Verification Methodology) – fully project-based
Testbench architecture design and reusable components
Assertion-Based Verification (SVA)
Simulation tools: ModelSim, QuestaSim, VCS
Doubt solving, mini-project help, and university assignments
Mock interviews and resume building for verification jobs
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💡 Why Choose Me?
Industry-level training, not just theory
Learn by doing – with practical examples and projects
100% personalized one-on-one sessions
Doubt clearing and flexible schedules
Special focus on job interview preparation for VLSI roles
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📘 Ideal for:
Engineering students (ECE/EEE/VLSI)
Final-year project guidance
Freshers aiming to crack top VLSI interviews
Professionals upskilling into functional verification roles
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🎁 First 30-minute consultation is FREE!
Let’s discuss your goals and customize a learning plan for you.
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📞 Available for online classes (Zoom/Google Meet)
🕒 Flexible timings including weekends
💬 Message me directly to book your session
Hello! I’m Shashank, a VLSI Verification engineer with several years of hands-on industry experience in Functional Verification, SystemVerilog, and UVM.
I specialize in teaching students, freshers, and professionals who want to break into the VLSI domain, strengthen their verification skills, or prepare for job interviews in top semiconductor companies.
---
✅ What I Teach:
SystemVerilog (from basics to advanced OOP concepts)
UVM (Universal Verification Methodology) – fully project-based
Testbench architecture design and reusable components
Assertion-Based Verification (SVA)
Simulation tools: ModelSim, QuestaSim, VCS
Doubt solving, mini-project help, and university assignments
Mock interviews and resume building for verification jobs
---
💡 Why Choose Me?
Industry-level training, not just theory
Learn by doing – with practical examples and projects
100% personalized one-on-one sessions
Doubt clearing and flexible schedules
Special focus on job interview preparation for VLSI roles
---
📘 Ideal for:
Engineering students (ECE/EEE/VLSI)
Final-year project guidance
Freshers aiming to crack top VLSI interviews
Professionals upskilling into functional verification roles
---
🎁 First 30-minute consultation is FREE!
Let’s discuss your goals and customize a learning plan for you.
---
📞 Available for online classes (Zoom/Google Meet)
🕒 Flexible timings including weekends
💬 Message me directly to book your session
Subjects
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SystemVerilog Beginner-Expert
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UVM (Universal Verification Methodology) Beginner-Expert
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SV (SystemVerilog) Beginner-Expert
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SystemVerilog Assertions Beginner-Expert
Experience
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Presilicon Verification engineer (Apr, 2021–Present) at INTEL Bangalore
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Asic Verification engineer (Apr, 2018–Apr, 2021) at Einfochips, An Arrow Company
Education
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Instrumentation & Control Engineering (Apr, 2012–Apr, 2016) from Government Engineering College, gandhinagar
Fee details
₹1,000–4,000/hour (US$10.53–42.10/hour)
Fees can vary depending upon the level of knowledge to be taught
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Munnekollal, Bengaluru, Karnataka, India
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Can travel:
6.22 mi (10.0 km)
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- Last login: Dec 2, 2025
- Registered: Jul 10, 2025
- Total Teaching exp: 0.0 yrs.
- Teaches online: Yes
- Online Teaching exp: 0.0 yrs.
- Teaches at student's home: Yes
- Homework Help: Yes
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Gender: Male
- Works as: Individual teacher
- Speaks: English, Hindi
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Fee:₹1,000–4,000/hour(USD 10.53–42.1/hour)
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