Usama Tabassum Electrical Electronics Engineer
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I am a Electrical Electronics Engineer having 4 years experience in Digital Electronics, Verilog HDL, VHDL, Fpgas,Digital Circuit Designing, Digital logic design,Printed Circuit Board Designing, Embedded systems and digital systems designing.
I have done so many projects related to Fpgas, digital Circuit designing and Embedded systems.
Here are some of my projects:
➡️Traffic Light Controller using Verilog HDL
➡️Sequencer Detector
➡️Vending machine using Verilog HDL/VHDL
➡️Washing Machine using Verilog HDL/VHDL
➡️ALU/Adders/Subtractors/Multiplier/Subtractor
➡️Counters/Registers/Ram/Rom
➡️Finite State Machines (Mealy or Moore)
➡️IP core based designing
➡️Mips Cpu designing
➡️Clock Dividers/PWM/Register File
➡️Up Counter/Down Counter/Random Sequence Counter
➡️Synchoronus/Asychoronous Counters
➡️Mux/DE-mux/Encoders/Decoders/Code Convertor Circuits
➡️K-map Simplification/Boolean Algebra
➡️Datapath/Instruction Decoder Design for CPU
➡️Instruction Sequence Fsm/Control Unit Design for CPU
➡️Shift Registers/Protocols like I2C
I have expertise on following tools:

Quatus, ModelSim, Xilinix ISE, Vivado Design Suite, EDA Playground, Multisim, Proteus, Logisim, Digital logic designer and simulator,DLD, Circuit Maker, Altium, EagleCad, Easyeda, logic ly, Ltspice,Cadence Orcad, Electronics Work bench and Logic works.

I have experience on following Fpgas boards:

▶️Xilinix Fpgas, Artiix-7,Nexys 2,3 and 4 boards
▶️Xilinix Spartan Series Fpgas boards
▶️Intel Fpgas, Max 10,Cyclone IV, Cyclone V
▶️Altera Fpgas, DE-10 Lite board

Subjects

  • Digital Electronics Beginner-Expert

  • Digital circuits Beginner-Expert

  • FPGA Design Beginner-Expert

  • Xilinx Vivado Beginner-Expert

  • DLD (Digital Logic Design) Beginner-Expert

  • Calculus 1, 2, 3, 4 Beginner-Expert

  • Logic Gates Beginner-Expert

  • Digital Systems Design Beginner-Expert

  • Digital logic Beginner-Expert

  • Computer architecture using Logisim Beginner-Expert

  • Circuit Analysis Beginner-Expert

  • Circuit theory and Network analysis Beginner-Expert

  • Verilog HDL and VHDL Beginner-Expert

  • Circuit fundamentals Beginner-Expert

  • Digital design and Verilog HDL Beginner-Expert

  • Intel Quartus Prime Beginner-Expert

  • Multisim and Proteus Beginner-Expert

  • Arduino programming and building projects Beginner-Expert

  • Digital Systems Design Using VHDL Beginner-Expert

Experience

  • Embedded Systems and FPGA Engineer (Apr, 2019–Aug, 2022) at Fiverr and Upwork
    I am Electrical Electronics Engineer having 3 years experience in digital electronics, embedded systens designing,Verilog HDL,VHDL, Fpgas, Digital logic design and Printed Circuit Designing Designing.
    I have done so many projects related to digital electronics and Embedded systems designing like Sequence Detector, Traffic Light controller, vending machine, Car barrier Entry/Exit System,ALU, Adders, Multipliers, Subtractor, Dividor,Finite state machines, Single Port Ram, Double Port Ram,Washing machine,Cpu designing, Control Unit, Instruction Sequence Fsm, Instruction Decoder and Datapath e.t.c.
    I have also experience in designing single layer, double layer and Multilayer printed Circuit boards. I
    I have expertise on following softwares:
    ➡️Vivado Design Suite
    ➡️Xilinix ISE
    ➡️Quartus
    ➡️EDA playground
    ➡️Modelsim
    ➡️Proteus
    ➡️Multisim
    ➡️DLD
    ➡️Ltspice
    ➡️Digital logic designer and simulator
    ➡️Logisim
    ➡️Altium
    ➡️Eaglecad
    ➡️Kicad
    ➡️Easyeda
    ➡️Cadence Orcad
    ➡️Electronics Workbench
    ➡️Circuit Maker 2000
    ➡️Logic ly
    I have experience on following Fpgas boards:
    ➡️Xilinix Fpgas, Artix-7, Nexy 2 3,4 series boards
    ➡️Spartan series Fpga boards
    ➡️Znyq Fpgas boards
    ➡️Intel Fpgas, Max 10,Cyclone IV, Cyclone V
    ➡️Altera Fpgas, DE-10 lite board

Education

  • Bsc Electrical Electronics Engineering (Oct, 2018–Jun, 2022) from UET Taxila Pakistan

Fee details

    Rs2,000–6,000/hour (US$7.18–21.54/hour)

    Fee will vary depending upon the work complexity and time required to compete task.

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